Vol.40 No.12

Journal of Xi'an Jiaotong University

Jan.2006

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Research on Hardware Design Patterns Based on Metaprogramming Techniques
Suo Zhihai1£¬Zhao Jizhong2£¬Lü Qing2
(1.Software Engineering School£¬Xi'an¡¡Jiaotong¡¡University£¬Xi'an ¡¡710049£¬China£»2.School of Electronics and Information Engineering£¬Xi'an¡¡Jiaotong¡¡University£¬Xi'an 710049£¬China)

Abstract£ºFocusing on the problems of hardware design complexity and low efficiency£¬ a clock signal hardware design pattern based on metaprogramming techniques is proposed£¬in which the interoperability between software and hardware design patterns is considered sufficiently and the idea of mature software design pattern is applied to the hardware design combined with metaprogramming techniques£® The core of the proposed design pattern is to use the parser of VHDL(very high speed integrated circuit hardware description language) to analyze the known device interfaces£¬ construct a syntax tree£¬ extract variable values of generator which is wrapped in a domain entity using metaprograms£¬ and the detailed VHDL code is therefore generated according to the design pattern and concrete variable values£® Application examples show that the code generated by the proposed design pattern has high validity and strong feasibility in the design process£¬ and can be applied widely to designing of complicated clock signal control systems£®
Keywords£ºdesign pattern£»metaprogramming techniques£»hardware description language£»clocksignal