Journal of Xi'an Jiaotong University

Research on 32-bit Floating-Point RISC Microprocessor with High-Performance
and Low Power Consumption
Sun Haijun¹,Shao Zhibiao¹,Zou Gang¹,Zhao Ning²
(1.School of Electronics and Information Engineering,Xi'an Jiaotong University,Xi'an 710049,China;
2.Xi'an Microelectronics Technology Institute,Xi'an 710054,China)

Abstract:A 32-bit floating-point reduced instruction set computer ( RISC) microprocessor with high-performance and low-power consumption has been successfully fabricated in 0.35μm CMOS technology. Three million transistors are integrated on a 7mm×7mm die housed in a 180- pin grid array (PGA).The processor has 4-stage pipeline,32-bit floating-point arithmetic and logic unit (ALU),32-bit floating-point multiplier,and 128 kb static random access memory (SRAM).Several innovative aspects are introduced in the control and datapath architecture levels including low-power datapath architecture for saving power,modified high radix Booth algorithm for fast 32-bit fixed-point and floating-point multiplication or division,and embedded bus preselector improving the performance of bus interface.The simulation results indicate that the power consumption of the processor can be reduced by 39%, and the operation frequency is increased by 38%.The chip testing shows that each instruction and its random combinations run correctly,and the power consumption of the chip is less than 164 mW at 50 MHz clock rate and 3.3 V power supply.
Keywords:reduced instruction set computer;microprocessor;bus preselector;high radix Booth algorithm; low-power architecture