Mei Kuizhi,Zheng Nanning,Wang Yong,Cao Fei,Lan Xuguang
(Institute of Artificial Intelligence and Robotics,Xi'an Jiaotong Unviersity,Xi'an 710049,China)
Abstract:Focusing on the large memory occupied by full-saved wavelet coefficients in JPEG2000 chip design,a dual buffer is applied to save the sub-band coefficients such as LH,HL, and HH in the discrete wavelet transform (DWT) architecture.In order to solve the problem of overlay writing of memory,the number of delay clocks between the input and output to the wavelet filter is established by its time sequence,and the clock number and the status of the tagbit of the buffer are used to determine the address generating of the input address generator,so that the controllable output of the wavelet filter can be realized.The on-chip RAM saved is up to 576 kb when the image tile size is 256×256 pels and the code block size is 16×16 pels.The architecture is verified to have less effect on the parallel encoding efficiency according to the distribution model of the wavelet coefficients and the statistical bit-planes in the buffer.Simulation results also show that the decrease of parallel efficiency is less than 2%.
Keywords:JPEG2000;discrete wavelet transform;wavelet coefficient memory; dual buffers;parallel efficiency