Research on a Circuit of Fast Conversion from Binary Signed Digit to Binary Complement
Luo Feng，Wu Shunjun
(National Key Lab of Radar Signal Processing, Xidian University,Xi'an 710071,China)

Abstract：A parallel architecture of carry lookahead-selected hybrid adder (CLSA) is presented for the conversion from binary signed digit (BSD) to binary complement (BC) by recoding the base of the BSD number system. The coversion is an addition operation of binary complement in fact. The computation delay is reduced from O(n)to O(lb n), and the application of the design is made possible for faster arithmetic logic unit and higher performance digit signal processor.
Keywords：binary signed digit;binary complement;carry lookahead-selected adder